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Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Produktform: E-Buch Text Elektronisches Buch in proprietärem

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable. weiterlesen

Elektronisches Format: PDF

Sprache(n): Englisch

ISBN: 978-3-319-02378-6 / 978-3319023786 / 9783319023786

Verlag: Springer International Publishing

Erscheinungsdatum: 19.11.2013

Seiten: 245

Autor(en): Krishnendu Chakrabarty, Brandon Noia

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