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Low-Power Variation-Tolerant Design in Nanometer Silicon

Produktform: E-Buch Text Elektronisches Buch in proprietärem

Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.weiterlesen

Elektronisches Format: PDF

Sprache(n): Englisch

ISBN: 978-1-4419-7418-1 / 978-1441974181 / 9781441974181

Verlag: Springer US

Erscheinungsdatum: 10.11.2010

Seiten: 440

Herausgegeben von Swarup Bhunia, Saibal Mukhopadhyay

96,29 € inkl. MwSt.
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