Functional verification of integrated circuits is considered part art, part science, luck, and a lot of hard work. But in reality, the nanometer designs of today require an advanced verification focus and dedicated professionals with knowledge and expertise in verification practices. Verification was once the domain of a specialist or the responsibility of an overworked designer. Today, verification has evolved into a full-fledged profession that demands dedicated practices and high standards of excellence. Advanced verification teams face enormous challenges, but where do verification professionals turn for help? Schools do not teach verification, research is not practical, and new tools often only make the problem more complex. So advanced verification teams must look to each other for the answers. Verification professionals can learn how to address the issues they face every day by studying the best practices used by other teams. is a guide to advanced functional verification in the nanometer era. It presents the best practices in functional verification used today and provides insights on how to solve the problems that verification teams face. is based on the experiences of advanced verification teams throughout the industry, along with work done at Cadence Design Systems. presents a complete and detailed Unified Verification Methodology based on the best practices in use today. It also addresses topics important to those doing advanced functional verification, such as assertions, functional coverage, formal verification, and reactive testbenches. weiterlesen